You may notice that I’ve made one modification of the previous schematic. A 0.01 µF capacitor has been added between pin 2 of each 555 timer (the Input) and negative ground. Why? Because when I tested the circuit without the capacitors, sometimes I found that one or both of the 555 timers would be triggered simply by flipping S1, the quizmaster switch, without anyone pressing a button.
At first this puzzled me. How were the timers getting triggered, without anyone doing anything? Maybe they were responding to “bounce” in the quizmaster switch. Sure enough, the small capacitors solved the problem. They may also slow the response of the 555 timers fractionally, but not enough to interfere with slow human reflexes.
As for the buttons, it doesn’t matter if they “bounce,” because each timer locks itself on at the very first impulse and ignores any hesitations that follow.
You can experiment building the circuit, disconnecting the 0.01 µF capacitors, and flipping S1 to and fro a dozen times. If you have a high-quality switch, you may not experience any problem. If you have a lower-quality switch, you may see a number of “false positives.” I’m going to explain more about “bounce,” and how to get rid of it, in the next experiment.
Figure 4-95. Applying the simplified schematic to a breadboard inevitably entails a wiring layout that is less intuitively obvious and appears more complex. The connections are the same, though.
Figure 4-96. The quiz schematic applied to a breadboard, to test the concept prior to full-scale implementation.
Enhancements
After you breadboard the circuit, if you proceed to build a permanent version, I suggest that you expand it so that at least four players can participate. This will require an OR gate capable of receiving four inputs. The 74HC4078 is the obvious choice, as it allows up to eight. Just connect any unused inputs to negative ground.
Alternatively, if you already have a couple of 74HC32 chips and you don’t want to bother ordering a 74HC4078, you can gang together three of the gates inside a single 74HC32 so that they function like a four-input OR. Look at the simple logic diagram in Figure 4-97 showing three ORs, and remember that the output from each OR will go high if at least one input is high.
Figure 4-97. Although a four-input OR gate is not manufactured, its functionality can be achieved easily by linking three 2-input OR gates together.
And while you’re thinking about this, see if you can figure out the inputs and output of three ANDs in the same configuration.
For a four-player game, you’ll also need two additional 555 timers, of course, and two more LEDs, and two more pushbuttons.
As for creating a schematic for the four-player game—I’m going to leave that to you. Begin by sketching a simplified version, just showing the logic symbols. Then convert that to a breadboard layout. And here’s a suggestion: pencil, paper, and an eraser can still be quicker, initially, than circuit-design software or graphic-design software, in my opinion.
Experiment 22: Flipping and Bouncing
I mentioned in the previous experiment that “bounce” from the buttons in the circuit wouldn’t be a problem, because the buttons were activating 555 timers that were wired in bistable, flip-flop mode. As soon as the timer receives the very first pulse, it flips into its new state and flops there, ignoring any additional noise in the circuit. So can we debounce a switch or a button using a flip-flop? And as some 74HCxx chips are available containing flip-flops, can we use them?
The answers are yes, and yes, although it’s not quite as simple as it sounds.
You will need:
74HC02 logic chip containing 4 NOR gates. 74HC00 logic chip containing 4 NAND gates. Quantity: 1 of each.
SPDT switch. Quantity: 1.
LEDs, low-current. Quantity: 2.
10K resistors and 1K resistors. Quantity: 2 of each.
Assemble the components on your breadboard, following the schematic shown in Figure 4-98. When you apply power (through your regulated 5-volt supply), one of the LEDs should be lit.
Figure 4-98. A simple circuit to test the behavior of two NOR gates wired as a simple flip-flop that retains its state after an input pulse ceases.
Now I want you to do something odd. Please disconnect the SPDT switch by taking hold of the wire that connects the positive power supply to the pole of the switch, and pulling the end of the wire out of the breadboard. When you do this, you may be surprised to find that the LED remains lit.
Push the wire back into the breadboard, flip the switch, and the first LED should go out, while the other LED should become lit. Once again, pull out the wire, and once again, the LED should remain lit.
Here’s the take-home message:
A flip-flop requires only an initial pulse.
After that, it ignores its input.
How It Works
Two NOR gates or two NAND gates can function as a flip-flop:
Use NOR gates when you have a positive input from a double-throw switch.
Use NAND gates when you have a negative input from a double-throw switch.
Either way, you have to use a double-throw switch.
I’ve mentioned the double-throw switch three times (actually, four times if you count this sentence!) because for some strange reason, most introductory books fail to emphasize this point. When I first started learning electronics, I went crazy trying to understand how two NORs or two NANDs could debounce a simple SPST pushbutton—until finally I realized that they can’t. The reason is that when you power up the circuit, the NOR gates (or NAND gates) need to be told in which state they should begin. They need an initial orientation, which comes from the switch being in one state or the other. So it has to be a double-throw switch. (Now I’ve mentioned it five times.)
I’m using another simplified multiple-step schematic, Figure 4-99, to show the changes that occur as the switch flips to and fro with two NOR gates. To refresh your memory, I’ve also included a truth table showing the logical outputs from NOR gates for each combination of inputs.
Figure 4-99. Using two NOR gates in conjunction with a positive input through a SPDT switch, this sequence of four diagrams shows how a flip-flop circuit responds.
Suppose that the switch is turned to the left. It sends positive current to the lefthand side of the circuit, overwhelming the negative supply from the pull-down resistor, so we can be sure that the NOR gate on the left has one positive logical input. Because any positive logical input will make the NOR give a negative output (as shown in the truth table), the negative output crosses over to the righthand NOR, so that it now has two negative inputs, which make it give a positive output. This crosses back to the lefthand NOR gate. So, in this configuration everything is stable.
Now comes the clever part. Suppose that you move the switch so that it doesn’t touch either of its contacts. (Or suppose that the switch contacts are bouncing, and failing to make a good contact. Or suppose you disconnect the switch entirely.) Without a positive supply from the switch, the lefthand input of the left NOR gate goes from positive to negative, as a result of the pull-down resistor. But the righthand input of this gate is still positive, and one positive is all it takes to make the NOR maintain its negative output, so nothing changes. In other words, the circuit has “flopped” in this state.
Now if the switch turns fully to the right and supplies positive power to the righthand pin of the right NOR gate, quick as a flash, that NOR recognizes that it now has a positive logical input, so it changes its logical output to negative. That goes across to the other NOR gate, which now has two negative inputs, so its output goes positive, and runs back to the right NOR.
In this way, the output states of the two NOR gates change places. They flip, and then flop there, even if the switch breaks contact or is disconnected again. The second set of drawings in Figure 4-100 shows exactly the same logic, using a neg
atively powered switch and two NAND gates. You can use your 74HC00 chip, specified in the parts list for this experiment, to test this yourself.
Figure 4-100. The schematic from Figure 4-99 can be rewired with NAND gates and a negative switched input.
Both of these configurations are examples of a jam-type flip-flop, so called because the switch forces it to respond immediately, and jams it into that state. You can use this circuit anytime you need to debounce a switch (as long as it’s a double-throw switch).
A more sophisticated version is a clocked flip-flop, which requires you to set the state of each input first and then supply a clock pulse to make the flip-flop respond. The pulse has to be clean and precise, which means that if you supply it from a switch, the switch must be debounced—probably by using another jam-type flip-flop! Considerations of this type have made me reluctant to use clocked flip-flops in this book. They add a layer of complexity, which I prefer to avoid in an introductory text.
What if you want to debounce a single-throw button or switch? Well, you have a problem! One solution is to buy a special-purpose chip such as the 4490 “bounce eliminator,” which contains digital delay circuitry. A specific part number is the MC14490PG from On Semiconductor. This contains six circuits for six separate inputs, each with an internal pull-up resistor. It’s relatively expensive, however—more than 10 times the price of a 74HC02 containing NOR gates. Really, it may be simpler to use double-throw switches that are easily debounced as described previously.
Experiment 23: Nice Dice
This is the one experiment where I want you to use the 74LSxx generation of the TTL logic family, instead of the 74HCxx family of CMOS. Two reasons: first, I need to use the 7492 counter, which is unavailable in the HC family. And second, you should know the basic facts about the LS series of TTL chips, as they still crop up in circuits that you’ll find in electronics books and online.
In addition, you’ll learn about “open collector” TTL chips such as the 74LS06 inverter, which can be a convenient substitute for transistors when you want to deliver as much as 40mA of current.
The idea of this circuit is simple enough: run a 555 timer sending very fast pulses to a counter that counts in sixes, driving LEDs that are placed to imitate the spots on a die. (Note that the word “die” is the singular of “dice.”) The counter runs so fast, the die-spots become a blur. When the user presses a button, the counter stops arbitrarily, displaying an unpredictable spot pattern.
Dice simulations have been around for many, many years, and you can even buy kits online. But this one will do something more: it will also demonstrate the principles of binary code.
So, if you’re ready for the triple threat of TTL chips, open collectors, and binary, let’s begin.
You will need:
74LS92 counter such as SN74LS92N by Texas Instruments. Quantity: 1 if you want to create one die, 2 to make two dice.
74LS27 three-input NOR gate such as SN74LS27N by Texas Instruments. Quantity: 1.
555 timers. Quantity: 1 if you want to make one die, 2 to make two dice.
Signal diodes, 1N4148 or similar. Quantity: 4, or 8 to make two dice.
Seeing Binary
The counter that we dealt with before was unusual, in that its outputs were designed to drive seven-segment numerals. A more common type has outputs that count in binary code.
The 74LS92 pinouts are shown in Figure 4-101. Plug the chip into your breadboard and make connections as shown in Figure 4-102. Initially, the 555 timer will drive the counter in slow-motion, at around 1 step per second. Figure 4-103 shows the actual components on a breadboard.
Note that the counter has unusual power inputs, on pins 5 and 10 instead of at the corners. Also four of its pins are completely unused, and do not connect with anything inside the chip. Therefore, you don’t need to attach any wire to them on the outside.
Figure 4-101. The unusual pin assignments include four that have no connection of any kind inside the chip, and can be left unattached.
Figure 4-102. This simple circuit uses a 555 timer running slowly to control the 74LS92 binary counter and display the succession of high states from its outputs.
Figure 4-103. The breadboard version of the schematic in Figure 4-102 to display the outputs from a 74LS92 counter.
Now we come to the first new and difficult fact about the 74LSxx generation of TTL chips that makes them less desirable, for our purposes, than the 74HCxx generation of CMOS chips that I have recommended in previous projects. The modern and civilized HC chips will source 4mA or sink 4mA at each logical output, but the older LS generation is fussier. It will sink around 8mA into each output pin from a positive source, but when its output is high, it hardly gives you anything at all. This is a very basic principle:
Outputs from TTL logic chips are designed to sink current.
They are not designed to source significant current.
In fact, the 74LS92 is rated to deliver less than half a milliamp. This is quite acceptable when you’re just connecting it with another logic chip, but if you want to drive an external device, it doesn’t provide much to work with.
The proper solution is to say to the chip, “All right, we’ll do it your way,” and set things up with a positive source that flows through a load resistor to the LED that you want to use, and from there into the output from the chip. This is the “better” option shown in Figure 4-104.
Figure 4-104. Most TTL chips, including those in the LS generation, are unable to source much current from their logical output pins (left) and should usually be wired to sink current from a positive source (right).
The only problem is that now the LED lights up when the counter’s output is low. But the counter is designed to display its output in high pulses. So your LED is now off when it should be on, and on when it should be off.
You can fix this by passing the signal through an inverter, but already I’m getting impatient with this inconvenience. My way around the problem, at least for demo purposes, is to use the “Not so good” option in Figure 4-104 and make it work by connecting a very-low-current LED with a large 4K7 load resistor. This will enable us to “see” the output from the counter without asking it to give more than its rated limit, and if you want to create a more visibly powerful display for a finished version of the dice circuit, I’ll deal with that later. According to my meter, the 4K7 resistor holds the current between 0.3mA and 0.4mA, which is the counter’s rated maximum.
Set up your initial version of the circuit as shown in Figures 4-102 and 4-103. Be careful when you wire the positive and negative power supply to the counter chip, with its nonstandard pin assignments.
The 555 will run in astable mode, at about 1 pulse per second. This becomes the clock signal for the counter. The first three binary outputs from the counter then drive the three LEDs.
The counter advances when the input signal goes from high to low. So when the LED beside the 555 timer goes out, that’s when the counter advances.
If you stare at the pattern generated by the outputs for long enough, you may be able to see the logic to it, bearing in mind that its zero state is when they are all off, and it counts up through five more steps before it repeats. The diagram in Figure 4-105 shows this sequence. If you want to know why the pattern works this way, check the following section, “Theory: Binary arithmetic.”
Figure 4-105. The three output pins of the 74LS92 counter have high states shown by the red circles as the counter steps from 000 to 101 in binary notation.
Theory
Binary arithmetic
The rule for binary counting is just a variation of the rule that we normally use for everyday counting, probably without thinking much about it. In a 10-based system, we count from 0 to 9, then carry 1 over to the next position on the left, and go from 0 to 9 again in the right-most position. We
repeat this procedure until we get to 99, then carry a 1 over to a new position to make 100, and continue counting.
In binary we do the same thing, except that we restrict ourselves to digits 0 and 1 only. So begin with 0 in the rightmost position, and count up to 1. As 1 is our limit, to continue counting we carry 1 over to the next place on the left, and start again from 0 in the right-most position. Count up to 1, then add 1 to the next place on the left—but, it already has a 1 in it, so it can’t count any higher. So, carry 1 from there one space further, to the next place beside that—and so on.
If a glowing LED represents a 1, and a dark LED represents a 0, the diagram in Figure 4-105 shows how the 74LS92 counts up from 0 to (decimal) 5 or (binary) 101 in its inimitable fashion. I’ve also included a diagram in Figure 4-106 showing how a counter with four binary outputs would display decimal numbers from 0 through 15, again using the LEDs to represent 1s and 0s.
Figure 4-106. A hexadecimal (16-based) binary counter would generate this succession of high states from its four output pins as it counts from 0 through 15 in decimal notation.
Make: Electronics Page 29
